ECE @ Carnegie Mellon · 2028

Joshua Taylor
Hardware & Software

Building systems at the boundary of silicon and software — verification, embedded, and the things in between.

Ford SWE · Summer 2026 BWXT IT Architecture · Summer 2025 github: Coizi

Software Development Intern

Ford Motor Company

Summer 2026

IT Architecture & Systems Engineering Intern

BWX Technologies

Summer 2025

Evaluated Microsoft CoPilot Studio and Power Automate for production readiness in a Government Cloud environment. Built an AI-powered resume screening tool for HR and an AI ticket response tool for the help desk. Applied government data security standards throughout.


AI-Powered Aim Assist System

HARDWARE

Jetson Orin Nano + global shutter camera + EMS actuators. Dual-mode PID controller running at 1kHz and SPI digital potentiometers for precise muscle stimulation control, achieving a 15ms pixel-to-stimulation response time.

PythonSPIPID 3rd place @ CMU HackberryPi

8-bit RISC-V Processor

FPGA / RTL

Full processor implementation in Verilog on Basys3 FPGA. Includes instruction decoder, testbench, and SystemVerilog FSM design.

SystemVerilogBasys3RISC-V

FPGA Vending Machine Controller

FPGA / RTL

SystemVerilog FSM-based coin acceptor on a Boolean FPGA board. Detects nickels, dimes, and quarters via pulse counting, with two-flop input synchronizers for metastability handling and 7-segment display output.

SystemVerilogFSMBoolean BoardRTL

PCB Design & Fabrication

PCB DESIGN

Designed and fabricated a PCB with defined test patterns, going end-to-end from schematic to physical board via JLCPCB with full BOM and CPL files.

Eagle/FusionJLCPCBBOM / CPL

LANGUAGES

SystemVerilog
Python
C / C++
MATLAB

HARDWARE

Basys3 FPGA
Jetson Orin
Raspberry Pi
Eagle / JLCPCB

CONCEPTS

RTL Design
Signals & Systems
PID Control
SPI / UART

TOOLS

Git / GitHub
Linux
Vivado
VS Code


Let’s connect.

jtaylor3@andrew.cmu.edu

get in touch ↗